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king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 1 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. - table of contents - 1. general des cription ___________________________________________________________________ 2 2. features _____________________________________________________________________________ 2 3. functional bl ock di agram______________________________________________________________ 3 4. pin descri ption _______________________________________________________________________ 3 5. pad location _________________________________________________________________________ 6 6. lcd ram map ______________________________________________________________________ 9 7. lcd powe r supply ___________________________________________________________________ 12 7.1. lcdc control register _____________________________________________________________ 14 8. oscilla tors __________________________________________________________________________ 14 9. general pur pose i/o__________________________________________________________________ 16 10. key scan circuit___________________________________________________________________ 17 11. timer1 ___________________________________________________________________________ 19 12. timer2 ___________________________________________________________________________ 20 13. time base interrupt________________________________________________________________ 22 14. watch dog timer __________________________________________________________________ 22 15. digital-to-ana log converter _________________________________________________________ 23 16. pulse-width mo dulation ____________________________________________________________ 24 17. absolute maxi mum rating __________________________________________________________ 25 18. recommended operati ng conditions _________________________________________________ 25 19. ac/dc charact eristics _____________________________________________________________ 25 20. application circuit_________________________________________________________________ 27 21. importan t note ____________________________________________________________________ 28 22. updated record ___________________________________________________________________ 29
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 2 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 1. general description HE84770D is a member of 8-bit micro-controller seri es developed by king billion electronics. four lcd driver configurations, 32 com x 128 seg, 48 com x 112 seg, 64 com x 96 seg or 80 com x 80 seg are available by mask option. 24 lcd segment driver pins are multiplexed with i/o pins to provide flexibility of wide variety of combinations to suit the needs of applications. the built-in lcd power supply is equipped with volta ge charge-pump circuit to genera te the high voltage required by the high duty lcd driver, bias voltage ge nerating circuit and input voltage re gulator circuit to supply stable lcd display effect over the wide battery life. the built -in op comparator can be used with (light, voice, temperature, humility) sensor and used as battery low detection. 7-bit current -type d/a converter and pwm device provide the complete speech output mechan ism. the 2 mb rom can be used in the storage of speech, graphic, text, etc. it is ideal for applications such as translator, data bank, educational toy, digital voice recording system, etc. the instruction set of he80000 series is easy to learn and simple to use. only 32 instructions with four addressing modes are provided. most of instructions take only 3 osci llator clocks to execute. the processing power is enough to mo st of battery operation system. 2. features 9 operation voltage: 2.4v ~ 3.6v 9 system clock: dc ~ 8mhz @ 3.6v dc ~ 4mhz @ 2.4v 9 internal rom: 2 mb (256 kb program rom + 1792 kb data rom) 9 internal ram: 16 kb 9 dual clock system: fast clock: 32768 ~ 8m hz (no internal clock) slow clock: 32768 hz 9 operation mode: fast, sl ow, idle and sleep modes. 9 24 ~ 48 bit bi-directional general purpose i/o port with push-pull or open-drain output type selectable for each i/o pin by mask option. 24 of them are multiplexed with lcd segment pins. 9 built-in 4x20 hardware keyboard scan circuit (multiplexed with lcd seg pin) helps to reduce the pin counts as well as the firmware effort. 9 voltage detector with two detecting thresholds. 9 four lcd configurations: 32 com x 128 seg, 48 com x 112 seg, 64 com x 96 seg or 80 com x 80 seg. all of lcd configurations are b type. 9 built-in lcd power supply with input voltage regulator, x3, x4, x5 voltage multiplier and bias voltage generating circuit. 9 one 7-bit current-type dac output. 9 single-ended pulse width modulation ci rcuit for alternat ive voice output. 9 built-in op comparator. 9 two 16-bit timers and one time-base timer. 9 watch dog timer to prevent deadlock condition. 9 two external interrupts and three internal timer interrupts. 9 instruction set: 32 instructions with 4 addressing mode.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 3 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 3. functional block diagram seg fxi, fxo com lcd driver 8 bit cpu fast clock osc. 2 mb rom sxi, sxo lcd power supply slow clock osc 16 kb ram prtc, prtd, prt10, pwm prt17 i/o port tc1 pwm sgky[43..24] tc2 vo, dao key scan dac tbi opo,opin, opip wdt op amp 4. pin description he84770 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 seg48 seg47 seg46 seg45 seg44 sgky 43 sgky 42 sgky 41 sgky 40 sgky 39 sgky 38 sgky 37 sgky 36 sgky 35 sgky 34 sgky 33 sgky 32 sgky 31 sgky 30 sgky 29 sgky 28 sgky 27 sgky 26 sgky 25 sgky 24 prt147 prt146 prt145 prt144 prt143 prt142 prt141 prt140 prt157 prt156 prt155 prt154 prt153 prt152 prt151 prt150 prt177 prt176 prt175 prt174 prt173 prt172 prt171 prt170 com31 com30 com29 com28 com27 com26 com25 c0m24 c0m23 c0m22 c0m21 c0m20 c0m19 c0m18 c0m17 c0m16 c0m15 c0m14 c0m13 c0m12 c0m11 c0m10 c0m9 c0m8 c0m7 c0m6 c0m5 c0m4 c0m3 com2 com1 com0 lvl1 lvl2 lvl3 lvl4 lvl5 lgs2 lvp lcap4a lcap2b lcap2a lcap1a lcap1b lcap3a lvreg lgs1 lvag gnd vo dao opin opip opo rstp_n fxo fxi tstp_p sxo sxi vdd prt107 prt106 prt105 prt104 prt103 prt102 prt101 prt100 prtd7 prtd6 prtd5 prtd4 prtd3 prtd2 prtd1 prtd0 gnd_pwm pwm prtc7 prtc6 prtc5 prtc4 prtc3 prtc2 prtc1 prtc0 vdd_ram cmsg32 cmsg33 cmsg34 cmsg35 cmsg36 cmsg37 cmsg38 cmsg39 cmsg40 cmsg41 cmsg42 cmsg43 cmsg44 cmsg45 cmsg46 cmsg47 cmsg48 cmsg49 cmsg50 cmsg51 cmsg52 cmsg53 cmsg54 cmsg55 cmsg56 cmsg57 cmsg58 cmsg59 cmsg60 cmsg61 cmsg62 cmsg63 cmsg64 cmsg65 cmsg66 cmsg67 cmsg68 cmsg69 cmsg70 cmsg71 cmsg72 cmsg73 cmsg74 cmsg75 cmsg76 cmsg77 cmsg78 cmsg79 seg79 seg78 seg77 seg76 seg75 seg74 seg73 seg72 seg71 seg70 seg69 seg68 seg67 seg66 seg65 seg64 seg63 seg62 seg61 seg60 seg59 seg58 seg57 seg56 seg55 seg54 seg53 seg52 seg51 seg50 seg49 pin name pin # i/o description seg[79..44] 186~216 , 1 ~ 5 o lcd segment seg[79..44] driver outputs. sgky[43..24] 6 ~ 25 o lcd segments share pads with key scan out scno[19..0]. the key scan function o f these pins can be disabled by mask opt ion clearing mo_lcdkey to ?0?, then sgky[43..24] function as lcd segment driver only. setting mo_lcdkey to ?1?
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 4 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pin name pin # i/o description will turn on the key scan function. prt14[7..0]/ seg[23:16] 26 ~ 33 b/ o 8-bit bi-directional i/o port 14 is shared with lcd segment pads seg[23..16]. the function of the pad can be selected individually by mask options mo_lio14[7..0]. (?1? for lcd and ?0? for i/o). the output type of i/o pad can also be selected by mask option mo_14pp[7..0] (1 for push-pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o as input, ?1? must be outputted before reading. prt15[7..0]/ seg[15:8] 34 ~ 41 b/ o 8-bit bi-directional i/o port 15 is shared with lcd segment pads seg[15..8]. the function of the pad can be selected individually by mask options mo_lio15[7..0]. (?1? for lcd and ?0? for i/o). the output type of i/o pad can also be selected by mask option mo_15pp[7..0] (1 for push-pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o as input, ?1? must be outputted before reading. prt17[7..0]/ seg[7:0] 42 ~ 49 b/ o 8-bit bi-directional i/o port 17 is shared with lcd segment pads seg[7..0]. the function of the pad can be selected individually by mask options mo_lio17[7..0]. (?1? for lcd and ?0? for i/o). the output type of i/o pad can also be selected by mask option mo_17pp[7..0] (1 for push-pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o as input, ?1? must be outputted before reading. com[31..0] 50 ~ 81 o lcd common driver pads. lvl1 82 p lcd bias voltage 1. lvl2 83 p lcd bias voltage 2 lvl3 84 p lcd bias voltage 3 lvl4 85 p lcd bias voltage 4 lvl5 86 p lcd bias voltage 5. lgs2 87 i lcd drive voltage setting lvp 88 p charge pump output.. lcap4a 89 o charge pump capacitor pin. lcap2b 90 o charge pump capacitor pin. lcap2a 91 o charge pump capacitor pin. lcap1a 92 o charge pump capacitor pin. lcap1b 93 o charge pump capacitor pin. lcap3a 94 o charge pump capacitor pin. lvreg 95 o voltage regulator output. vdd is regulated to generate lvreg, which is in turns pumped to lvp. adjust resistor between lgs1 and lvreg to set lvreg voltage. lgs1 96 i regulator voltage setting lvag 97 o reference voltage output. fi xed 0.9 volt dc reference voltage gnd 98 p power ground input. vo 99 o dac voice output. set the bit 1 and clear the bit 0 of voc (da = ?1? and op = ?0?) register to turn on dac with vo output. dao 100 o alternate output of dac. set both bit 1 and bit 0 of voc register (da = ?1? and op = ?1?) to turn on dac with dao output as well as op comparator. opin 101 i inverting input of op amp. set the bit 0 of voc register (op = ?1?) to turn on op comparator. opip 102 i non-inverting input of op amp. opo 103 o output of op amp. rstp_n 104 i system reset input pin. level trigger, active low on this pin will put the chip in reset state. fxo, 105, 106 o, external fast clock pin. two ty pes of oscillator can be selected by mo_fxtal (?0?
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 5 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pin name pin # i/o description fxi b for rc type and ?1? for crystal type). for rc type oscillator, one resistor need to be connected between fxi and gnd. for crystal o scillator, one crystal need to be placed between fxi and fxo. please refer to application circuit for details. tstp_p 107 i test input pin. please bond this pad and reser ve a test point on pcb for debugging. but for improving esd, please connect this point with zero ohm resistor to gnd . sxo, sxi 108, 109 o, i external slow clock pins. slow clock is clock source for lcd display, timer1, time-base and other internal blocks. both crystal and rc oscillator are provided. the slow clock type can be selected by mask option mo_sxtal. choose ?0? for rc type and ?1? for crystal oscillator. vdd 110 p positive power input. 0.1 f decoupling capacitors should be placed as close to ic vdd and gnd pads as possible for best decoupling effect. prt10[7..0] 111 ~ 118 b 8-bit bi-directional i/o port 10. the output type of i/o pad can be selected by mask option mo_10pp[7..0] (?1? for push- pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o pad as input pad, ?1? must be outputted before reading. prtd[7..0] 119 ~ 126 b 8-bit bi-directional i/o port d. the output type of i/o pad can also be selected by mask option mo_dpp[7..0] (?1? for push-pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o as input, ?1? must be outputted before reading the pin. prtd[7..2] can be used as wake-up pins. prtd[7..6] can be as external interrupt sources. gnd_pwm 127 o dedicated ground for pwm output. pwm 128 o the pwm output can drive speaker or buzzer directly. set the bit2 of voc register as one to turn on pwm. using vdd & pwm to drive output device. prtc[7..0] 129 ~ 136 b 8-bit bi-directional i/o port c. prtc[7:4] is shared with key scan dedicated input scni[3:0]. the key scan function can be disabled by clearing mo_lcdkey mask option to ?0?. the output type of i/o pad can also be selected by mask option mo_cpp[7..0] (?1? for push-pull and ?0? for open-drain). as the output structure of i/o pad does not contain tri-state b uffer. when using the i/o as input, ?1? must be outputted before reading the pin. vdd_ram 137 p dedicated power input for ram cmsg[32..79] 138 ~ 185 o com[32..79] pads are shared with seg[127.. 80] outputs. the functions of the pads to be com drivers or seg drivers can be selected by mask option mo_com[0]. please refer to lcd driver configuration for details. i: input, o: output, b: bidirectional, p: power.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 6 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 5. pad location die size: 9300 m * 4200 m substrate connect with gnd product name p r t 14 [4] /s e g [ 20 ] p r t 14 [5] /s e g [ 21 ] p r t 14 [6] /s e g [ 22 ] p r t 14 [7] /s e g [ 23 ] s g k y [ 24 ] s g k y [ 25 ] s g k y [ 26 ] s g k y [ 27 ] s g k y [ 28 ] s g k y [ 29 ] s g k y [ 30 ] s g k y [ 31 ] s g k y [ 32 ] s g k y [ 33 ] s g k y [ 34 ] s g k y [ 35 ] s g k y [ 36 ] s g k y [ 37 ] s g k y [ 38 ] s g k y [ 39 ] s g k y [ 40 ] s g k y [ 41 ] s g k y [ 42 ] s g k y [ 43 ] s e g [ 44 ] s e g [ 45 ] s e g [ 46 ] s e g [ 47 ] s e g [ 48 ] prt14 [ 3 ] /seg [ 19 ] prt14 [ 2 ] /seg [ 18 ] prt14 [ 1 ] /seg [ 17 ] prt14 [ 0 ] /seg [ 16 ] prt15 [ 7 ] /seg [ 15 ] prt15 [ 6 ] /seg [ 14 ] prt15 [ 5 ] /seg [ 13 ] prt15 [ 4 ] /seg [ 12 ] prt15 [ 3 ] /seg [ 11 ] prt15 [ 2 ] /seg [ 10 ] prt15 [ 1 ] /seg [ 9 ] prt15 [ 0 ] /seg [ 8 ] prt17 [ 7 ] /seg [ 7 ] prt17 [ 6 ] /seg [ 6 ] prt17 [ 5 ] /seg [ 5 ] prt17 [ 4 ] /seg [ 4 ] prt17 [ 3 ] /seg [ 3 ] prt17 [ 2 ] /seg [ 2 ] prt17 [ 1 ] /seg [ 1 ] prt17 [ 0 ] /seg [ 0 ] com [ 31 ] com [ 30 ] com [ 29 ] com [ 28 ] com [ 27 ] com [ 26 ] com [ 25 ] com [ 24 ] com [ 23 ] com [ 22 ] com [ 21 ] com [ 20 ] com [ 19 ] com [ 18 ] com [ 17 ] com [ 16 ] com [ 15 ] com [ 14 ] com [ 13 ] com [ 12 ] com [ 11 ] com [ 10 ] com [ 9 ] com [ 8 ] com [ 7 ] com [ 6 ] com [ 5 ] com [ 4 ] com [ 3 ] com [ 2 ] com [ 1 ] com [ 0 ] lv l1 lv l2 lv l3 lv l4 lv l5 lgs2 lvp lcap4a lcap2b lcap2a lcap1a lcap1b lcap3a lvr e g lgs1 lva g gnd vo dao opin opip opo rstp n fxo fxi tstp p sxo s x i v d d p r t 10 [7] p r t 10 [6] p r t 10 [5] p r t 10 [4] p r t 10 [3] p r t 10 [2] p r t 10 [1] p r t 10 [0] p r t d [7] p r t d [6] p r t d [5] p r t d [4] p r t d [3] p r t d [2] p r t d [1] p r t d [0] g n d _ p w m p w m p r t c [7] /s c n i [3] p r t c [6] /s c n i [2] p r t c [5] /s c n i [1] p r t c [4] /s c n i [0] p r t c [3] p r t c [2] p r t c [1] p r t c [0] v d d seg [ 49 ] seg [ 50 ] seg [ 51 ] seg [ 52 ] seg [ 53 ] seg [ 54 ] seg [ 55 ] seg [ 56 ] seg [ 57 ] seg [ 58 ] seg [ 59 ] seg [ 60 ] seg [ 61 ] seg [ 62 ] seg [ 63 ] seg [ 64 ] seg [ 65 ] seg [ 66 ] seg [ 67 ] seg [ 68 ] seg [ 69 ] seg [ 70 ] seg [ 71 ] seg [ 72 ] seg [ 73 ] seg [ 74 ] seg [ 75 ] seg [ 76 ] seg [ 77 ] seg [ 78 ] seg [ 79 ] com [ 79 ] /seg [ 80 ] com [ 78 ] /seg [ 81 ] com [ 77 ] /seg [ 82 ] com [ 76 ] /seg [ 83 ] com [ 75 ] /seg [ 84 ] com [ 74 ] /seg [ 85 ] com [ 73 ] /seg [ 86 ] com [ 72 ] /seg [ 87 ] com [ 71 ] /seg [ 88 ] com [ 70 ] /seg [ 89 ] com [ 69 ] /seg [ 90 ] com [ 68 ] /seg [ 91 ] com [ 67 ] /seg [ 92 ] com [ 66 ] /seg [ 93 ] com [ 65 ] /seg [ 94 ] com [ 64 ] /seg [ 95 ] com [ 63 ] /seg [ 96 ] com [ 62 ] /seg [ 97 ] com [ 61 ] /seg [ 98 ] com [ 60 ] /seg [ 99 ] com [ 59 ] /seg [ 100 ] com [ 58 ] /seg [ 101 ] com [ 57 ] /seg [ 102 ] com [ 56 ] /seg [ 103 ] com [ 55 ] /seg [ 104 ] com [ 54 ] /seg [ 105 ] com [ 53 ] /seg [ 106 ] com [ 52 ] /seg [ 107 ] com [ 51 ] /seg [ 108 ] com [ 50 ] /seg [ 109 ] com [ 49 ] /seg [ 110 ] com [ 48 ] /seg [ 111 ] com [ 47 ] /seg [ 112 ] com [ 46 ] /seg [ 113 ] com [ 45 ] /seg [ 114 ] com [ 44 ] /seg [ 115 ] com [ 43 ] /seg [ 116 ] com [ 42 ] /seg [ 117 ] com [ 41 ] /seg [ 118 ] com [ 40 ] /seg [ 119 ] com [ 39 ] /seg [ 120 ] com [ 38 ] /seg [ 121 ] com [ 37 ] /seg [ 122 ] com [ 36 ] /seg [ 123 ] com [ 35 ] /seg [ 124 ] com [ 34 ] /seg [ 125 ] com [ 33 ] /seg [ 126 ] com [ 32 ] /seg [ 127 ] x axis
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 7 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pin number pin name x coordinate y coordinate pin number pin name x coordinate y coordinate 1 seg[48] x= -4597.00 y= 1616.90 109 sxi x= 4601.00 y= -1682.45 2 seg[47] x= -4597.00 y= 1501.90 110 vdd x= 4601.00 y= -1567.45 3 seg[46] x= -4597.00 y= 1386.90 111 prt10[7] x= 4601.00 y= -1452.45 4 seg[45] x= -4597.00 y= 1271.90 112 prt10[6] x= 4601.00 y= -1337.45 5 seg[44] x= -4597.00 y= 1156.90 113 prt10[5] x= 4601.00 y= -1222.45 6 sgky[43] x= -4597.00 y= 1041.90 114 prt10[4] x= 4601.00 y= -1107.45 7 sgky[42] x= -4597.00 y= 926.90 115 prt10[3] x= 4601.00 y= -992.45 8 sgky[41] x= -4597.00 y= 811.90 116 prt10[2] x= 4601.00 y= -877.45 9 sgky[40] x= -4597.00 y= 696.90 117 prt10[1] x= 4601.00 y= -762.45 10 sgky[39] x= -4597.00 y= 581.90 118 prt10[0] x= 4601.00 y= -647.45 11 sgky[38] x= -4597.00 y= 466.90 119 prtd[7] x= 4601.00 y= -532.45 12 sgky[37] x= -4597.00 y= 351.90 120 prtd[6] x= 4601.00 y= -417.45 13 sgky[36] x= -4597.00 y= 236.90 121 prtd[5] x= 4601.00 y= -302.45 14 sgky[35] x= -4597.00 y= 121.90 122 prtd[4] x= 4601.00 y= -187.45 15 sgky[34] x= -4597.00 y= 6.90 123 prtd[3] x= 4601.00 y= -72.45 16 sgky[33] x= -4597.00 y= -108.10 124 prtd[2] x= 4601.00 y= 42.55 17 sgky[32] x= -4597.00 y= -223.10 125 prtd[1] x= 4601.00 y= 157.55 18 sgky[31] x= -4597.00 y= -338.10 126 prtd[0] x= 4601.00 y= 272.55 19 sgky[30] x= -4597.00 y= -453.10 127 gnd_pwm x= 4601.00 y= 387.55 20 sgky[29] x= -4597.00 y= -568.10 128 pwm x= 4601.00 y= 512.50 21 sgky[28] x= -4597.00 y= -683.10 129 prtc[7] x= 4601.00 y= 635.55 22 sgky[27] x= -4597.00 y= -798.10 130 prtc[6] x= 4601.00 y= 750.55 23 sgky[26] x= -4597.00 y= -913.10 131 prtc[5] x= 4601.00 y= 865.55 24 sgky[25] x= -4597.00 y= -1028.10 132 prtc[4] x= 4601.00 y= 980.55 25 sgky[24] x= -4597.00 y= -1143.10 133 prtc[3] x= 4601.00 y= 1095.55 26 prt14[7] x= -4597.00 y= -1258.10 134 prtc[2] x= 4601.00 y= 1210.55 27 prt14[6] x= -4597.00 y= -1373.10 135 prtc[1] x= 4601.00 y= 1325.55 28 prt14[5] x= -4597.00 y= -1488.10 136 prtc[0] x= 4601.00 y= 1440.55 29 prt14[4] x= -4597.00 y= -1603.10 137 vdd x= 4601.00 y= 1555.55 30 prt14[3] x= -4450.65 y= -1996.95 138 cmsg[32] x= 4552.90 y= 1997.90 31 prt14[2] x= -4335.65 y= -1996.95 139 cmsg[33] x= 4437.90 y= 1997.90 32 prt14[1] x= -4208.90 y= -1996.95 140 cmsg[34] x= 4322.90 y= 1997.90 33 prt14[0] x= -4093.90 y= -1996.95 141 cmsg[35] x= 4207.90 y= 1997.90 34 prt15[7] x= -3978.90 y= -1996.95 142 cmsg[36] x= 4092.90 y= 1997.90 35 prt15[6] x= -3863.90 y= -1996.95 143 cmsg[37] x= 3977.90 y= 1997.90 36 prt15[5] x= -3748.90 y= -1996.95 144 cmsg[38] x= 3862.90 y= 1997.90 37 prt15[4] x= -3633.90 y= -1996.95 145 cmsg[39] x= 3747.90 y= 1997.90 38 prt15[3] x= -3518.90 y= -1996.95 146 cmsg[40] x= 3632.90 y= 1997.90 39 prt15[2] x= -3403.90 y= -1996.95 147 cmsg[41] x= 3517.90 y= 1997.90 40 prt15[1] x= -3288.90 y= -1996.95 148 cmsg[42] x= 3402.90 y= 1997.90 41 prt15[0] x= -3173.90 y= -1996.95 149 cmsg[43] x= 3287.90 y= 1997.90 42 prt17[7] x= -3058.90 y= -1996.95 150 cmsg[44] x= 3172.90 y= 1997.90 43 prt17[6] x= -2943.90 y= -1996.95 151 cmsg[45] x= 3057.90 y= 1997.90 44 prt17[5] x= -2828.90 y= -1996.95 152 cmsg[46] x= 2942.90 y= 1997.90
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 8 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pin number pin name x coordinate y coordinate pin number pin name x coordinate y coordinate 45 prt17[4] x= -2713.90 y= -1996.95 153 cmsg[47] x= 2827.90 y= 1997.90 46 prt17[3] x= -2598.90 y= -1996.95 154 cmsg[48] x= 2712.90 y= 1997.90 47 prt17[2] x= -2483.90 y= -1996.95 155 cmsg[49] x= 2597.90 y= 1997.90 48 prt17[1] x= -2368.90 y= -1996.95 156 cmsg[50] x= 2482.90 y= 1997.90 49 prt17[0] x= -2253.90 y= -1996.95 157 cmsg[51] x= 2367.90 y= 1997.90 50 com[31] x= -2138.90 y= -1996.95 158 cmsg[52] x= 2252.90 y= 1997.90 51 com[30] x= -2023.90 y= -1996.95 159 cmsg[53] x= 2137.90 y= 1997.90 52 com[29] x= -1908.90 y= -1996.95 160 cmsg[54] x= 2022.90 y= 1997.90 53 com[28] x= -1793.90 y= -1996.95 161 cmsg[55] x= 1907.90 y= 1997.90 54 com[27] x= -1678.90 y= -1996.95 162 cmsg[56] x= 1792.90 y= 1997.90 55 com[26] x= -1563.90 y= -1996.95 163 cmsg[57] x= 1677.90 y= 1997.90 56 com[25] x= -1448.90 y= -1996.95 164 cmsg[58] x= 1562.90 y= 1997.90 57 com[24] x= -1333.90 y= -1996.95 165 cmsg[59] x= 1447.90 y= 1997.90 58 com[23] x= -1218.90 y= -1996.95 166 cmsg[60] x= 1332.90 y= 1997.90 59 com[22] x= -1103.90 y= -1996.95 167 cmsg[61] x= 1217.90 y= 1997.90 60 com[21] x= -988.90 y= -1996.95 168 cmsg[62] x= 1102.90 y= 1997.90 61 com[20] x= -873.90 y= -1996.95 169 cmsg[63] x= 987.90 y= 1997.90 62 com[19] x= -758.90 y= -1996.95 170 cmsg[64] x= 872.90 y= 1997.90 63 com[18] x= -643.90 y= -1996.95 171 cmsg[65] x= 757.90 y= 1997.90 64 com[17] x= -528.90 y= -1996.95 172 cmsg[66] x= 642.90 y= 1997.90 65 com[16] x= -393.90 y= -1996.95 173 cmsg[67] x= 527.90 y= 1997.90 66 com[15] x= -278.90 y= -1996.95 174 cmsg[68] x= 412.90 y= 1997.90 67 com[14] x= -163.90 y= -1996.95 175 cmsg[69] x= 297.90 y= 1997.90 68 com[13] x= -48.90 y= -1996.95 176 cmsg[70] x= 182.90 y= 1997.90 69 com[12] x= 66.10 y= -1996.95 177 cmsg[71] x= 67.90 y= 1997.90 70 com[11] x= 181.10 y= -1996.95 178 cmsg[72] x= -47.10 y= 1997.90 71 com[10] x= 296.10 y= -1996.95 179 cmsg[73] x= -162.10 y= 1997.90 72 com[9] x= 411.10 y= -1996.95 180 cmsg[74] x= -277.10 y= 1997.90 73 com[8] x= 526.10 y= -1996.95 181 cmsg[75] x= -392.10 y= 1997.90 74 com[7] x= 641.10 y= -1996.95 182 cmsg[76] x= -527.10 y= 1997.90 75 com[6] x= 756.10 y= -1996.95 183 cmsg[77] x= -642.10 y= 1997.90 76 com[5] x= 871.10 y= -1996.95 184 cmsg[78] x= -757.10 y= 1997.90 77 com[4] x= 986.10 y= -1996.95 185 cmsg[79] x= -872.10 y= 1997.90 78 com[3] x= 1101.10 y= -1996.95 186 seg[79] x= -987.10 y= 1997.90 79 com[2] x= 1216.10 y= -1996.95 187 seg[78] x= -1102.10 y= 1997.90 80 com[1] x= 1331.10 y= -1996.95 188 seg[77] x= -1217.10 y= 1997.90 81 com[0] x= 1446.10 y= -1996.95 189 seg[76] x= -1332.10 y= 1997.90 82 lvl1 x= 1561.10 y= -1996.95 190 seg[75] x= -1447.10 y= 1997.90 83 lvl2 x= 1676.10 y= -1996.95 191 seg[74] x= -1562.10 y= 1997.90 84 lvl3 x= 1791.10 y= -1996.95 192 seg[73] x= -1677.10 y= 1997.90 85 lvl4 x= 1906.10 y= -1996.95 193 seg[72] x= -1792.10 y= 1997.90 86 lvl5 x= 2021.10 y= -1996.95 194 seg[71] x= -1907.10 y= 1997.90 87 lgs2 x= 2136.10 y= -1996.95 195 seg[70] x= -2022.10 y= 1997.90 88 lvp x= 2251.10 y= -1996.95 196 seg[69] x= -2137.10 y= 1997.90 89 lcap4a x= 2366.10 y= -1996.95 197 seg[68] x= -2252.10 y= 1997.90 90 lcap2b x= 2481.10 y= -1996.95 198 seg[67] x= -2367.10 y= 1997.90
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 9 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pin number pin name x coordinate y coordinate pin number pin name x coordinate y coordinate 91 lcap2a x= 2596.10 y= -1996.95 199 seg[66] x= -2482.10 y= 1997.90 92 lcap1a x= 2711.10 y= -1996.95 200 seg[65] x= -2597.10 y= 1997.90 93 lcap1b x= 2826.10 y= -1996.95 201 seg[64] x= -2712.10 y= 1997.90 94 lcap3a x= 2941.10 y= -1996.95 202 seg[63] x= -2827.10 y= 1997.90 95 lvreg x= 3056.10 y= -1996.95 203 seg[62] x= -2942.10 y= 1997.90 96 lgs1 x= 3171.10 y= -1996.95 204 seg[61] x= -3057.10 y= 1997.90 97 lvag x= 3286.10 y= -1996.95 205 seg[60] x= -3172.10 y= 1997.90 98 gnd x= 3401.10 y= -1996.95 206 seg[59] x= -3287.10 y= 1997.90 99 vo x= 3516.10 y= -1996.95 207 seg[58] x= -3402.10 y= 1997.90 100 dao x= 3631.10 y= -1996.95 208 seg[57] x= -3517.10 y= 1997.90 101 opin x= 3746.10 y= -1996.95 209 seg[56] x= -3632.10 y= 1997.90 102 opip x= 3861.10 y= -1996.95 210 seg[55] x= -3747.10 y= 1997.90 103 opo x= 3976.10 y= -1996.95 211 seg[54] x= -3862.10 y= 1997.90 104 rstp_n x= 4091.10 y= -1996.95 212 seg[53] x= -3977.10 y= 1997.90 105 fxo x= 4206.10 y= -1996.95 213 seg[52] x= -4092.10 y= 1997.90 106 fxi x= 4321.10 y= -1996.95 214 seg[51] x= -4207.10 y= 1997.90 107 tstp_p x= 4436.10 y= -1996.95 215 seg[50] x= -4322.10 y= 1997.90 108 sxo x= 4551.10 y= -1996.95 216 seg[49] x= -4437.10 y= 1997.90 6. lcd ram map there are 4 lcd configurations as determined by mask option mo_com[1..0 ]. the functions of cmsg[79..32] are different in each configuration as listed in the following table. mo_com[1..0] configuration cms g[79..64] cmsg[63..48] cmsg[47..32] 00 32 x 128 seg[80..95] seg[96..111] seg[112..127] 01 48 x 112 seg[80..95] seg[96..111] com[47..32] 10 64 x 96 seg[80..95] com[63..48] com[47..32] 11 80 x 80 com[79..64] com[63..48] com[47..32]
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 10 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. cmsg32 com32 com32 com32 seg127 cmsg33 com33 com33 com33 seg126 cmsg34 com34 com34 com34 seg125 cmsg35 com35 com35 com35 seg124 cmsg36 com36 com36 com36 seg123 cmsg37 com37 com37 com37 seg122 cmsg38 com38 com38 com38 seg121 cmsg39 com39 com39 com39 seg120 cmsg40 com40 com40 com40 seg119 cmsg41 com41 com41 com41 seg118 cmsg42 com42 com42 com42 seg117 cmsg43 com43 com43 com43 seg116 cmsg44 com44 com44 com44 seg115 cmsg45 com45 com45 com45 seg114 cmsg46 com46 com46 com46 seg113 cmsg47 com47 com47 com47 seg112 cmsg48 com48 com48 seg111 seg111 cmsg49 com49 com49 seg110 seg110 cmsg50 com50 com50 seg109 seg109 cmsg51 com51 com51 seg108 seg108 cmsg52 com52 com52 seg107 seg107 cmsg53 com53 com53 seg106 seg106 cmsg54 com54 com54 seg105 seg105 cmsg55 com55 com55 seg104 seg104 cmsg56 com56 com56 seg103 seg103 cmsg57 com57 com57 seg102 seg102 cmsg58 com58 com58 seg101 seg101 cmsg59 com59 com59 seg100 seg100 cmsg60 com60 com60 seg99 seg99 cmsg61 com61 com61 seg98 seg98 cmsg62 com62 com62 seg97 seg97 cmsg63 com63 com63 seg96 seg96 cmsg64 com64 seg95 seg95 seg95 cmsg65 com65 seg94 seg94 seg94 cmsg66 com66 seg93 seg93 seg93 cmsg67 com67 seg92 seg92 seg92 cmsg68 com68 seg91 seg91 seg91 cmsg69 com69 seg90 seg90 seg90 cmsg70 com70 seg89 seg89 seg89 cmsg71 com71 seg88 seg88 seg88 cmsg72 com72 seg87 seg87 seg87 cmsg73 com73 seg86 seg86 seg86 cmsg74 com74 seg85 seg85 seg85 cmsg75 com75 seg84 seg84 seg84 cmsg76 com76 seg83 seg83 seg83 cmsg77 com77 seg82 seg82 seg82 cmsg78 com78 seg81 seg81 seg81 cmsg79 com79 seg80 seg80 seg80 64x96 80x80 comxseg 32x128 48x112 the ram maps of all four different lcd configurations are as the following: 32 com: page 7 seg [7:0] seg [15:8] seg [23:16] seg [31:24] seg [39:32] seg [47:40] seg [55:48] seg [63:56] com0 7e0h 7c0h 7a0h 780h 760h 740h 720h 700h com1 7e1h 7c1h 7a1h 781h 761h 741h 721h 701h : : : : : : : : : com15 7efh 7cfh 7afh 78fh 76fh 74fh 72fh 70fh com16 7f0h 7d0h 7b0h 790h 770h 750h 730h 710h : : : : : : : : : com30 7feh 7deh 7beh 79eh 77eh 75eh 73eh 71eh com31 7ffh 7dfh 7bfh 79fh 77fh 75fh 73fh 71fh page 6 seg [71:64] seg [79:72] seg [87:80] seg [95:88] seg [103:96] seg [111:104] seg [119:112] seg [127:120] com0 6e0h 6c0h 6a0h 680h 660h 640h 620h 600h com1 6e1h 6c1h 6a1h 681h 661h 641h 621h 601h : : : : : : : : : com15 6efh 6cfh 6afh 68fh 66fh 64fh 62fh 60fh com16 6f0h 6d0h 6b0h 690h 670h 650h 630h 610h
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 11 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. : : : : : : : : : com30 6feh 6deh 6beh 69eh 67eh 65eh 63eh 61eh com31 6ffh 6dfh 6bfh 69fh 67fh 65fh 63fh 61fh 48 com page 7,6 seg[7:0] seg[15:8] seg[23:16] seg[31:24] seg[39:32] seg[47:40] seg[55:48] com0 7c0h 780h 740h 700h 6c0h 680h 640h com1 7c1h 781h 741h 701h 6c1h 681h 641h : : : : : : : : com15 7cfh 78fh 74fh 70fh 6cfh 68fh 64fh com16 7d0h 790h 750h 710h 6d0h 690h 650h : : : : : : : : com31 7dfh 79fh 75fh 71fh 6dfh 69fh 65fh com32 7e0h 7a0h 760h 720h 6e0h 6a0h 660h : : : : : : : : com46 7eeh 7aeh 76eh 72eh 6eeh 6aeh 66eh com47 7efh 7afh 76fh 72fh 6efh 6afh 66fh page 6, 5, 4 seg [63:56] seg [71:64] seg [79:72] seg [87:80] seg [95:88] seg [103:96] seg [111:104] com0 600h 5c0h 580h 540h 500h 4c0h 480h com1 601h 5c1h 581h 541h 501h 4c1h 481h : : : : : : : : com15 60fh 5cfh 58fh 54fh 50fh 4cfh 48fh com16 610h 5d0h 590h 550h 510h 4d0h 490h : : : : : : : : com31 61fh 5dfh 59fh 55fh 51fh 4dfh 49fh com32 620h 5e0h 5a0h 560h 520h 4e0h 4a0h : : : : : : : : com46 62eh 5eeh 5aeh 56eh 52eh 4eeh 4aeh com47 62fh 5efh 5afh 56fh 52fh 4efh 4afh 64 com page 7,6 seg[7:0] seg[15:8] seg[23:16] seg[31:24] seg[39:32] seg[47:40] com0 7c0h 780h 740h 700h 6c0h 680h com1 7c1h 781h 741h 701h 6c1h 681h : : : : : : : com15 7cfh 78fh 74fh 70fh 6cfh 68fh com16 7d0h 790h 750h 710h 6d0h 690h : : : : : : : com31 7dfh 79fh 75fh 71fh 6dfh 69fh com32 7e0h 7a0h 760h 720h 6e0h 6a0h : : : : : : : com47 7efh 7afh 76fh 72fh 6efh 6afh com48 7f0h 7b0h 770h 730h 6f0h 6b0h : : : : : : : com62 7feh 7beh 77eh 73eh 6feh 6beh com63 7ffh 7bfh 77fh 73fh 6ffh 6bfh
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 12 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. page 6, 5 seg[55:48] seg[63:56] seg[71:64] seg[79:72] seg[87:80] seg[95:88] com0 640h 600h 5c0h 580h 540h 500h com1 641h 601h 5c1h 581h 541h 501h : : : : : : : com15 64fh 60fh 5cfh 58fh 54fh 50fh com16 650h 610h 5d0h 590h 550h 510h : : : : : : : com31 65fh 61fh 5dfh 59fh 55fh 51fh com32 660h 620h 5e0h 5a0h 560h 520h : : : : : : : com47 66fh 62fh 5efh 5afh 56fh 52fh com48 670h 630h 5f0h 5b0h 570h 530h : : : : : : : com62 67eh 63eh 5feh 5beh 57eh 53eh com63 67fh 63fh 5ffh 5bfh 57fh 53fh 80 com page 7:3 seg [7:0] seg [15:8] seg [23:16] seg [31:24] seg [39:32] seg [47:40] seg [55:48] seg [63:56] seg [71:64] seg [79:72] com0 780h 700h 680h 600h 580h 500h 480h 400h 380h 300h com1 781h 701h 681h 601h 581h 501h 481h 401h 381h 301h : : : : : : : : : : : com15 78fh 70fh 68fh 60fh 58fh 50fh 48fh 40fh 38fh 30fh com16 790h 710h 690h 610h 590h 510h 490h 410h 390h 310h : : : : : : : : : : : com31 79fh 71fh 69fh 61fh 59fh 51fh 49fh 41fh 39fh 31fh com32 7a0h 720h 6a0h 620h 5a0h 520h 4a0h 420h 3a0h 320h : : : : : : : : : : : com47 7afh 72fh 6afh 62fh 5afh 52fh 4afh 42fh 3afh 32fh com48 7b0h 730h 6b0h 630h 5b0h 530h 4b0h 430h 3b0h 330h : : : : : : : : : : : com62 7bfh 73fh 6bfh 63fh 5bfh 53fh 4bfh 43fh 3bfh 33fh com63 7c0h 740h 6c0h 640h 5c0h 540h 4c0h 440h 3c0h 340h : : : : : : : : : : : com78 7ceh 74eh 6ceh 64eh 5ceh 54eh 4ceh 44eh 3ceh 34eh com79 7cfh 74fh 6cfh 64fh 5cfh 54fh 4cfh 44fh 3cfh 34fh 7. lcd power supply the built-in lcd power supply is equipped with input voltage regulator, volta ge multiplier and bias voltage generating circuit with active buffer instead of passive resistor vo ltage dividing network. the input voltage is regulated to lv reg using the internally generated lvag as reference voltage. lvreg can be adjusted by resistor between lgs1 and lvreg. lvreg adjustment guideline : first, the level of vdd must be 0.3 volt higher than lvreg even at the end of battery life for the regulator to function properl y. for example, if the vdd is expected to drop to 2.2 volts when battery is low, then the level of lvreg can only be set at 1.9 volts max. secondly, the higher the level of lvreg, the less multiples it require s to pump lvp to same level. for example, to
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 13 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. pump the 2.25 volts to 9 volts requires 4 times multipli er; to pump the 3 volts to 9 volts requires only 3 time multiplier which consumes less power. so it is advisable not to adjust the lvreg to an unnecessary low level. voltage multiplication: the lvreg is then multiplied by 3, 4, or 5 times, depending on external capacitors configurations as shown be low, to generate lvp. please note that lvp must be lower than 9 volts to prevent chip from breaking down. lvl1 lvl1 lvl1 lvl2 lvl2 lvl2 lvl3 lvl3 lvl3 lvl4 lvl4 lvl4 lvl5 lvl5 lvl5 lgs2 lgs2 lgs2 lvp lvp lvp lcap4a lcap4a lcap4a lcap2b lcap2b lcap2b lcap2a lcap2a lcap2a lcap1a lcap1a lcap1a lcap1b lcap1b lcap1b lcap3a lcap3a lcap3a lvreg lvreg lvreg lgs1 lgs1 lgs1 lvag lvag lvag 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf r r 0.1uf 0.1uf 0.1uf 0.1uf r r 4.7uf 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf r r 0.1uf 0.1uf 4.7uf 4.7uf 0.1uf 0.1uf 4.7uf 4.7uf 10uf 4.7uf 0.1uf 0.1uf 4.7uf 4.7uf 4.7uf 10uf 10uf x4 multiplier x5 multiplier x3 multiplier the lvp is then regulated to generated lvl1 ~ lvl 5. lvl5 can be adjusted by the resistor between lgs2 and lv5. be sure to leave at least 0.3 volt between lvp and lv 5 for the regulator circuit to function properly. the formula is: lvl5 = (1 + r2/80k) x 0.9v different duties require different bi as settings. there is some theo retical correspondence between the duty and bias setting. however, it is better to use it as starting point and adjust it with real lcd panel connected to it to de termine the final setting. the theoretic relationship between the duty and bias setting as following: duty cycle normal bias alternative bias 32 duty 1/7 1/7.5 48 duty 1/8 1/7.5, 1/8.5 64 duty 1/9 1/8.5, 1/9.5 80 duty 1/10 1/9.5, 1/10.5 the bias setting is made by mask option mo_lbsr[2..0]. mo_lbsr[2..0] bias setting
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 14 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 000 1/7 001 1/7.5 010 1/8 011 1/8.5 100 1/9 101 1/9.5 110 1/10 111 1/10.5 7.1. lcdc control register the gray scale of the lcd driver can be adjusted by gray field of lcd. the lcd panel can be blanked by setting the blank field of lcdc re gister. lcd driver can be totally turned off by clearing lcde bit of lcdc. lcdc bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 field - - - gray blank lcde reset - - - - - - 1 0 field value function gray 000 lcd is darkest. 111 lcd is lightest. blank 0 normal display 1 lcd display blanked. the com signals of lcd driver output inactive levels (lvl4 and lvl1) while seg signals output normal display patterns. lcde 0 lcd driver disabled, lc d driver has no output signal. 1 lcd driver enabled please note that lcd driver must be turned off be fore the mcu goes into sleep mode. in other words, user must clear the bit 0 (lcde bit) of lcdc to turn off lcd driving circuit before setting bit6 of op1 to enter sleep mode. large current might happen if the procedure is not followed. please note that lcd driver uses slow clock as clock source. th e lcd display would not display normally if it worked in fast clock only mode as the lcd refresh action would be too fast. 8. oscillators the mcu is equipped with two clock sources with a va riety of selections on the types of oscillators to choose from. so that system designer can select oscillator ty pes based on the cost target, timing accuracy requirements etc. crystal, resonator or the rc osc illator can be used as fast clock source, components should be placed as close to the pins as possible. the type of oscillator used is selected by mask option mo_fxtal.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 15 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. vdd fxi fxi fxo crystal osc. rc osc. mo_fxtal fast clock type 0 rc oscillator. 1 crystal oscillator. slow clock is clock source for lcd display, timer1, a nd timer base, etc. two types of oscillator, crystal and rc, can be used as slow clock by mask opti on mo_sxtal. if used for time keeping function or other applications that required the accurate timing, crystal oscilla tor is recommended. if the timing accuracy is not important, then rc type os cillator can be used to reduce cost. mo_sxtal slow clock type 0 r/c oscillator 1 crystal oscillator sxi sxi sxo sxo crystal osc. rc osc. with two clock sources available, the system can switch among operation modes of fast, slow, idle, and sleep modes by the setting of op1 and op2 registers as shown in ta bles below to suit the needs of application such as power saving, etc. op1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 field drdy stop slow inte t2e t1e z c mode r/w r/w r/w r/w r/w r/w r/w r/w reset 1 0 0 0 0 0 - - op2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 field idle pnwk tcwk tbe tbs[3..0] mode r/w r r r/w w w w w reset 0 - - 0 - - - -
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 16 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. if the dual clock mode is used, the lcd display, timer1 and timer base will derive its clock source from slow clock while the other blocks will operate with the fast clock. 9. general purpose i/o there are three dedicated genera l purpose i/o port, prtc, prtd and prt10, while prt14, prt15 and prt17 are multiplexed with lcd segment driver pins . all the i/o ports are bi-directional and of non- tri-state output structure. th e output has weak sourcing (50 a) and stronger sinking (1 ma) capability and each can be configured as push-pull or open-dr ain output structure individually by mask option. when the i/o port is used as input , the weakly high sourcing can be used as weakly pull-up. open drain can be used if the pull-up is not required and let the external driver to drive the pin. please note that a floating pad could cause more power consumption since the noise coul d interfere with the circuit and cause the input to toggle. a ?1? needs to be written to port first before reading the input data from the i/o pin. if the pmos is used as pull- up, care should be taken to avoid the constant power drain by dc path between pull-up and ex ternal circuit. the input port has built-in schmidt trigger to pr event it from chattering. hysteresis level of schmidt trigger is 1/3*vdd. vdd vdd q q' latch mo_?pp sc h mi d t trigger input dout pad din as pads of prt14, prt15 and prt17 are shared with lcd segment driver, the function of the pads is determined by mask options.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 17 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. prt170 seg0 prt170 prt171 seg1 prt171 prt172 seg2 prt172 prt173 seg3 prt173 prt174 seg4 prt174 prt175 seg5 prt175 prt176 seg6 prt176 prt177 seg7 prt177 prt150 seg8 prt150 prt151 seg9 prt151 prt152 seg10 prt152 prt153 seg11 prt153 prt154 seg12 prt154 prt155 seg13 prt155 prt156 seg14 prt156 prt157 seg15 prt157 prt140 seg16 prt140 prt141 seg17 prt141 prt142 seg18 prt142 prt143 seg19 prt143 prt144 seg20 prt144 prt145 seg21 prt145 prt146 seg22 prt146 prt147 seg23 prt147 lio17=1 lio17=0 lio15=0 lio15=1 lio14=0 lio14=1 following table is the setting fo r mo_lio?[...] and mo_?pp[...] and others related to lcd display setting and pin assignment features. mo_lio?[?] mo_?pp[...] i/o port lcd pin 0 0 open-drain output -- 0 1 push-pull output -- 1 0 -- xx 1 1 -- lcd display --: function not available. xx: displayable, but may have a bnormal leakage current, do not use. 10. key scan circuit the built-in 4x20 hardware keyboard scan circuit he lps to reduce the pin c ounts where application requires large key matrix and high lc d pixel count as well as the firmwa re effort. as key-scan pins are shared with lcd segment and prtc4 ~ prtc7 pins, it is advisable to put resist ors between segment pins and key matrix to avoid shorting the segment pins wh en two or more keys in the same row are pressed simultaneously. two key can be detected simultaneously and the first detected key code is stored in key0 register and the second in key1 register resp ectively. the key code for each key location is listed in the following table. key loc scni0 scni1 scni2 scni3 scno0 0x80 0xa0 0xc0 0xe0 scno1 0x81 0xa1 0xc1 0xe1 scno2 0x82 0xa2 0xc2 0xe2 scno3 0x83 0xa3 0xc3 0xe3 scno4 0x84 0xa4 0xc4 0xe4
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 18 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. scno5 0x85 0xa5 0xc5 0xe5 scno6 0x86 0xa6 0xc6 0xe6 scno7 0x87 0xa7 0xc7 0xe7 scno8 0x88 0xa8 0xc8 0xe8 scno9 0x89 0xa9 0xc9 0xe9 scno10 0x8a 0xaa 0xca 0xea scno11 0x8b 0xab 0xcb 0xeb scno12 0x8c 0xac 0xcc 0xec scno13 0x8d 0xad 0xcd 0xed scno14 0x8e 0xae 0xce 0xee scno15 0x8f 0xaf 0xcf 0xef scno16 0x90 0xb0 0xd0 0xf0 scno17 0x91 0xb1 0xd1 0xf1 scno18 0x92 0xb2 0xd2 0xf2 scno19 0x93 0xb3 0xd3 0xf3 key0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0x22 r row index column index key1 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0x23 r row index column index the bit 7 of key0 and key1 is repeat indicator when the same key is scanned for the second time, the r bit will be cleared to indicate the key is not released yet. the key-scan function can be turned on/off by mask option mo_lcdkey. mo_lcdkey sgky[43..24] function 0 as seg only 1 as seg as well as key_scan the pulse width of key-scan signal can be selected by mask op tions mo_snck[1..0]. mo_snck[1..0] key scan pulse width 00 0.5 sck 01 1 sck 10 1.5 sck 11 2 sck the strength of key-scan signal can also be selected by mask options mo_snck[1..0]. mo_scdrv[1..0] key scan signal strength 00 weakest 01 10 11 strongest
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 19 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. sgky 24 scno0 sgky 25 scno1 sgky 26 scno2 sgky 27 scno3 sgky 41 scno17 sgky 42 scno18 sgky 43 scno19 prtc4 scni0 prtc5 scni1 prtc6 scni2 prtc7 scni3 47k 47k 47k 47k 47k 47k 47k : .... 11. timer1 the timer1 consists of two 8-bi t write-only preload registers t1h and t1l and 16-bit down counter. if timer1 is enabled, the counter will decrement by one with each incoming clock pulse. timer1 interrupt will be generated when the counter underflows - counts down to ffffh. and the counter will be automatically reloaded with the value of t1h and t1l. the clock source of timer1 is derived from slow cl ock ?sck? at dual clock or slow clock only mode. and it comes from the fast clock ?fck? at fast clock only mode. please note that the interrupt is generated when counter counts from 0000h to ffffh. if the value of t1h and t1l is n, and count down to ffffh, the tota l count is n+1. the conten t of counter is zero when system resets. once it is enabled to count at this moment, interrupt will be generated immediately and value of t1h and t1l will be loaded since it counts to ffffh. so the t1h and t1l value should be set before enabling timer1.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 20 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. t1h t1l "timer1 counter" decreases 1 count to 0xffffh auto reload when timer1 underflo w no start timer1 interrupt request. yes the contents of t1h and t1l almost loaded into timer1 immediately when timer1 is turned o n after reset. t1_int the timer1 related control registers are list as below: register address field bit position mode description ier 0x02 tc1_ier 2 r/w 0: tc1 interrupt is disabled. (default) 1: tc1 interrupt is enabled. t1l 0x03 t1l[7:0] 7~0 w low byte of tc1 pre-load value t1h 0x04 t1h[7:0] 7~0 w high byte of tc1 pre-load value op1 0x09 tc1e 2 r/w 0: tc1 is disabled. (default) 1: tc1 is enabled. 12. timer2 timer2 is similar in structure to timer1 except that clock source of timer2 comes from the system clock ?fsys?/1.5. the system clock ?fsys? varies depending on the operation modes of the mcu. the timer2 consists of two 8-bi t write-only preload registers t2h and t2l and 16-bit down counter. if timer2 is enabled, counter will decrement by one with each incoming clock pulse. timer2 interrupt will be generated when the counter underflows - counts dow n to ffffh. and it will be automatically reloaded
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 21 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. with the value of t2h and t2l. please note that the interrupt signal is generated when counter counts from 0000h to ffffh. if the value of counter is n, and count down to ffffh, the total c ount is n+1. the content of counter is zero when system resets. once it is enabled to count at this time, the interrupt will be generated immediately and value of t2h and t2l will be loaded since the counter counts to ffffh. so the t2h and t2l value should be set before enabling timer2. t2h t2l "timer2 counter" decreases 1 count to 0xffffh auto reload when timer2 underflo w no start timer2 interrupt request. yes the contents of t2h and t2l almost loaded into timer2 immediately when timer2 is turned o n after reset. t2_int the timer2 related control registers are list as below: register address field bit position mode description ier 0x02 tc2_ier 1 r/w 0: tc2 interrupt is disabled. (default) 1: tc2 interrupt is enabled. t2l 0x05 t2l[7:0] 7~0 w low byte of tc2 pre-load value t2h 0x06 t2h[7:0] 7~0 w high byte of tc2 pre-load value op1 0x09 tc2e 3 r/w 0: tc2 is disabled. (default) 1: tc2 is enabled.
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 22 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 13. time base interrupt the tb timer is used to generate time-out interrupt at fixed peri od. the time-out frequency of tb is determined by dividing slow clock with a factor selected in op2[3:0]. tbe (time base enable) bit controls enable or disable of the circuit. op2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 field idle pnwk tcwk tbe tbs[3..0] mode r/w r r r/w w w w w reset 0 - - 0 - - - - tbe function 0 disable time base 1 enable time base for example, if the slow clock is 32768 hz, then the interrupt frequency is as shown in following table. tbs[3..0] interrupt frequency 0000 16.384 khz 0001 8.192 khz 0010 4.096 khz 0011 2.048 khz 0100 1.024 khz 0101 512 hz 0110 256 hz 0111 128 hz 1000 64 hz 1001 32 hz 1010 16 hz 1011 8 hz 1100 4 hz 1101 2 hz 1110 1 hz 1111 0.5 hz 14. watch dog timer watch dog timer (wdt) is designed to reset system automatically prevent system dead lock caused by abnormal hardware activities or program execution. wdt needs to be enabled in mask option. mo_wdte function 0 wdt disable 1 wdt enable to use wdt function, ?clrwdt? instruction needs to be executed in every possible program path when the program runs normally in order to clears th e wdt counter before it overflows, so that the
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 23 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. program can operate normally. when abnormal condi tions happen to cause th e mcu to divert from normal path, the wdt counter will not be cleared and reset signal will be generated. wdt is the enabling signal generated by calculating 32768 -clock overflow. reset register content is same as tc1 (timer1 clock), which uses the same clock count source. wdt function can be generated in normal, slow and idle mode. however, wdt will not function during sleep mode (as the tc1 clock has stopped.) 15. digital-to-analog converter the digital-to-analog converter (d ac) converts the 7-bit unsigned sp eech data written to pwmc to proportional current output. pwmc register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 da & pwm data 0 da and pwm output value control 1 pwm o/p driver - - - pwme there are two output paths for the dac. either vo or dao can be sel ected as output port of dac by voc register when it is enable d. the vo output is primarily intended for speech generation, although it is not necessary so, while the dao output path can be used in conjunction with built-in op comparator to function as an analog-to-dig ital converter as required in applications such as speech recording, speech recognition or sensor interfaces. opo opip opin dao pwmc[data] vo voc[dac] voc[op] r dac + - 1 0 op the dac is enabled by dac bit of voc register. plea se note that the dac bit of voc register will be automatically cleared when the system enter idle or sleep mode. so it need s to be set again when returning to normal mode. voc register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 field - - - - - pwm dac op reset - - - - - 0 0 0 bit name value function description 1 da enable 1 dac 0 da disable
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 24 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 16. pulse-width modulation the pulse-width modulator (pwm) converts 7-bit unsigne d speech data written to pwmc data register to proportional duty cycle of pwm output. pwm modul e shares the pwmc data register with digit-to-analog converter. so pwm and da output can exist at the same time. when pwm circuit is enabled, it generates signal with duty ratio in proportion to the da value. da = 0x20 da = 0x80 da = 0xe0 1 subframe the pwm bit of voc register controls register to enable the circuit a nd output driver. when pwm bit of voc is ?0?, pwme bit and output drivers settings are both cleared. to use pwm for voice output, pwm bit has to be set to ?1? first, then set pwme bit and enable output driv er by setting the driver number. if pwm bit is disabled and enabled again, the sett ing for driver and pwme bit will be clear. the fast clock is gated through pwme bit of pwmc command register to provide the clock source of pwm circuit when it is enabled. as pwm needs highe r frequency to operate, it cannot generate correct pwm signal in slow clock only mode. when the program enters into sleep mode or idle mode, it will automatically turn off all voice outputs by clearing voc[2..1] to ?00?. to ac tivate voice output again when returning to normal mode, the voc register needs to be set again. the pwm output volume can be adjusted by command register pwmc[6..4]. the bit 6 and 5 control 2 time driver, while bit 4 controls 1 time driver, thus it has 5 levels of driver output. by turning on/off the internal drivers, the sound level of pwm output can be turned up and down. please note that this adjustment apply only to pwm, but not da output. pwm output driver selection pwmc[6..4] number of driver 000 off 001 1 010 2 011 3 100 2 101 3 110 4 111 5
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 25 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 17. absolute maximum rating item sym. rating condition supply voltage v dd -0.5v ~ 4.0v lcd operating voltage v lvp < 8 volts input voltage v in -0.5v ~ v dd +0.5v output voltage v o -0.5v ~ v dd +0.5v operating temperature t op 0 c ~ 70 c storage temperature t st -50 c ~ 100 c 18. recommended operating conditions item sym. rating condition supply voltage v dd 2.4v ~ 3.6v v ih 0.9 v dd ~ v dd input voltage v il 0.0v ~ 0.1 v dd 8mhz v dd =3.0v operating frequency f max 6mhz v dd =2.4v operating temperature t op 0 c ~ 70 c storage temperature t st -50 c ~ 100 c 19. ac/dc characteristics testing condition : temp=25 , vdd=3v10% parameters symbol min. typ. max. unit condition power consumption normal mode current i fast 1 1.5 ma 2m external r/c fast clock slow mode current i slow 15 25 a 32768 hz slow clock with lcd disabled idle mode current i idle 10 20 a 32768 hz slow clock with lcd disabled sleep mode current i sleep 1 a 200 220 lvp=3*lvreg 250 275 lvp=4*lvreg additional current if lcd on i lcd 300 330 a lvp=5*lvreg i/o specification input high voltage v ih 0.8 vdd input pins input low voltage v il 0.2 vdd input pins input hysteresis width v hys 1/3 vdd i/o, rstp_n threshold = 2/3xvdd (input from low to high), threshold = 1/3xvdd (input from high to low) output source current i oh 50 a output drive high *1, v ol =2.0v output sink current i ol1 1.0 ma output drive low, v ol =0.4v input low current i il1 20 a rstp_n, v il = gnd, pull high internally input low current i il2 100 a i/o, v il =gnd, if pull high internally by user pwm and dac pwm output current i pwm 10 14 ma pwm *2 with 32 loading
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 26 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 6 8 ma with 64 ? loading 4 5 ma with 100 ? loading dac output current i ovo 2.5 3 ma vo, dao@ vdd=3v,vo=0~2v, data = 7f notes: 1. the ?output source current? specification is a pplicable only to the push-pull i/o type. 2. this specification indicates only one pwm driving capability, and there are totally five built-in drivers, user can multiply the actual number of driver to get the actual current. (i pwm x n; where n = 0, 1, 2, 3, 4, 5)
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 27 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 20. application circuit vdd vdd vdd vdd cmsg32 com32 com32 com32 seg127 cmsg33 com33 com33 com33 seg126 prt170 seg0 prt170 cmsg34 com34 com34 com34 seg125 prt171 seg1 prt171 cmsg35 com35 com35 com35 seg124 prt172 seg2 prt172 cmsg36 com36 com36 com36 seg123 prt173 seg3 prt173 cmsg37 com37 com37 com37 seg122 prt174 seg4 prt174 cmsg38 com38 com38 com38 seg121 prt175 seg5 prt175 cmsg39 com39 com39 com39 seg120 prt176 seg6 prt176 cmsg40 com40 com40 com40 seg119 prt177 seg7 prt177 cmsg41 com41 com41 com41 seg118 cmsg42 com42 com42 com42 seg117 cmsg43 com43 com43 com43 seg116 seg48 cmsg44 com44 com44 com44 seg115 seg47 prt150 seg8 prt150 cmsg45 com45 com45 com45 seg114 seg46 prtc0 prt151 seg9 prt151 cmsg46 com46 com46 com46 seg113 seg45 prtc1 prt152 seg10 prt152 cmsg47 com47 com47 com47 seg112 seg44 prtc2 prt153 seg11 prt153 cmsg48 com48 com48 seg111 seg111 seg43 prtc3 prt154 seg12 prt154 cmsg49 com49 com49 seg110 seg110 seg42 prtc4 prt155 seg13 prt155 cmsg50 com50 com50 seg109 seg109 seg41 prtc5 prt156 seg14 prt156 cmsg51 com51 com51 seg108 seg108 seg40 prtc6 prt157 seg15 prt157 cmsg52 com52 com52 seg107 seg107 seg39 prtc7 cmsg53 com53 com53 seg106 seg106 seg38 pwm cmsg54 com54 com54 seg105 seg105 seg37 cmsg55 com55 com55 seg104 seg104 seg36 prtd0 prt140 seg16 prt140 cmsg56 com56 com56 seg103 seg103 seg35 prtd1 prt141 seg17 prt141 cmsg57 com57 com57 seg102 seg102 seg34 prtd2 prt142 seg18 prt142 cmsg58 com58 com58 seg101 seg101 seg33 prtd3 prt143 seg19 prt143 cmsg59 com59 com59 seg100 seg100 seg32 prtd4 prt144 seg20 prt144 cmsg60 com60 com60 seg99 seg99 seg31 prtd5 prt145 seg21 prt145 cmsg61 com61 com61 seg98 seg98 seg30 prtd6 prt146 seg22 prt146 cmsg62 com62 com62 seg97 seg97 seg29 prtd7 prt147 seg23 prt147 cmsg63 com63 com63 seg96 seg96 seg28 prt100 cmsg64 com64 seg95 seg95 seg95 seg27 prt101 cmsg65 com65 seg94 seg94 seg94 seg26 prt102 cmsg66 com66 seg93 seg93 seg93 seg25 prt103 cmsg67 com67 seg92 seg92 seg92 seg24 prt104 cmsg68 com68 seg91 seg91 seg91 prt147 prt105 cmsg69 com69 seg90 seg90 seg90 prt146 prt106 cmsg70 com70 seg89 seg89 seg89 prt145 prt107 cmsg71 com71 seg88 seg88 seg88 prt144 cmsg72 com72 seg87 seg87 seg87 sxi cmsg73 com73 seg86 seg86 seg86 cmsg74 com74 seg85 seg85 seg85 cmsg75 com75 seg84 seg84 seg84 sxi cmsg76 com76 seg83 seg83 seg83 cmsg77 com77 seg82 seg82 seg82 cmsg78 com78 seg81 seg81 seg81 cmsg79 com79 seg80 seg80 seg80 sxo fxi fxi fxo sxi sgky24 scno0 sgky25 scno1 sgky26 scno2 sgky27 scno3 sgky41 scno17 sgky42 scno18 sxo sgky43 scno19 prtc4 scni0 prtc5 scni1 lvl1 lvl1 lvl1 prtc6 scni2 lvl2 lvl2 lvl2 prtc7 scni3 lvl3 lvl3 lvl3 lvl4 lvl4 lvl4 lvl5 lvl5 lvl5 lgs2 lgs2 lgs2 lvp lvp lvp lcap4a lcap4a lcap4a lcap2b lcap2b lcap2b lcap2a lcap2a lcap2a lcap1a lcap1a lcap1a lcap1b lcap1b lcap1b lcap3a lcap3a lcap3a lvreg lvreg lvreg lgs1 lgs1 lgs1 lvag lvag lvag seg49 prt143 seg50 prt142 seg51 prt141 seg52 prt140 seg53 prt157 seg54 prt156 seg55 prt155 seg56 prt154 seg57 prt153 seg58 prt152 seg59 prt151 seg60 prt150 seg61 prt177 seg62 prt176 seg63 prt175 seg64 prt174 seg65 prt173 seg66 prt172 seg67 prt171 seg68 prt170 seg69 com31 seg70 com30 seg71 com29 seg72 com28 seg73 com27 seg74 com26 seg75 com25 seg76 com24 seg77 com23 seg78 com22 seg79 com21 cmsg79 com20 cmsg78 com19 cmsg77 com18 cmsg76 com17 cmsg75 com16 cmsg74 com15 cmsg73 com14 cmsg72 com13 cmsg71 com12 cmsg70 com11 cmsg69 com10 cmsg68 com9 cmsg67 com8 cmsg66 com7 cmsg65 com6 cmsg64 com5 cmsg63 com4 cmsg62 com3 cmsg61 com2 cmsg60 com1 cmsg59 com0 cmsg58 lvl1 cmsg57 lvl2 cmsg56 lvl3 cmsg55 lvl4 cmsg54 lvl5 cmsg53 lgs2 cmsg52 lvp cmsg51 lcap4a cmsg50 lcap2b cmsg49 lcap2a cmsg48 lcap1a cmsg47 lcap1b cmsg46 lcap3a cmsg45 lvreg cmsg44 lgs1 cmsg43 lvag cmsg42 cmsg41 vo cmsg40 dao cmsg39 opin cmsg38 opip cmsg37 opo cmsg36 rst cmsg35 fxo cmsg34 fxi cmsg33 cmsg32 sxo he84770 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 seg48 seg47 seg46 seg45 seg44 sgky43 sgky42 sgky41 sgky40 sgky39 sgky38 sgky37 sgky36 sgky35 sgky34 sgky33 sgky32 sgky31 sgky30 sgky29 sgky28 sgky27 sgky26 sgky25 sgky24 prt147 prt146 prt145 prt144 prt143 prt142 prt141 prt140 prt157 prt156 prt155 prt154 prt153 prt152 prt151 prt150 prt177 prt176 prt175 prt174 prt173 prt172 prt171 prt170 com31 com30 com29 com28 com27 com26 com25 c0m24 c0m23 c0m22 c0m21 c0m20 c0m19 c0m18 c0m17 c0m16 c0m15 c0m14 c0m13 c0m12 c0m11 c0m10 c0m9 c0m8 c0m7 c0m6 c0m5 c0m4 c0m3 com2 com1 com0 lvl1 lvl2 lvl3 lvl4 lvl5 lgs2 lvp lcap4a lcap2b lcap2a lcap1a lcap1b lcap3a lvreg lgs1 lvag gnd vo dao opin opip opo rstp_n fxo fxi tstp_p sxo sxi vdd prt107 prt106 prt105 prt104 prt103 prt102 prt101 prt100 prtd7 prtd6 prtd5 prtd4 prtd3 prtd2 prtd1 prtd0 gnd_pwm pwm prtc7 prtc6 prtc5 prtc4 prtc3 prtc2 prtc1 prtc0 vdd_ram cmsg32 cmsg33 cmsg34 cmsg35 cmsg36 cmsg37 cmsg38 cmsg39 cmsg40 cmsg41 cmsg42 cmsg43 cmsg44 cmsg45 cmsg46 cmsg47 cmsg48 cmsg49 cmsg50 cmsg51 cmsg52 cmsg53 cmsg54 cmsg55 cmsg56 cmsg57 cmsg58 cmsg59 cmsg60 cmsg61 cmsg62 cmsg63 cmsg64 cmsg65 cmsg66 cmsg67 cmsg68 cmsg69 cmsg70 cmsg71 cmsg72 cmsg73 cmsg74 cmsg75 cmsg76 cmsg77 cmsg78 cmsg79 seg79 seg78 seg77 seg76 seg75 seg74 seg73 seg72 seg71 seg70 seg69 seg68 seg67 seg66 seg65 seg64 seg63 seg62 seg61 seg60 seg59 seg58 seg57 seg56 seg55 seg54 seg53 seg52 seg51 seg50 seg49 0 20p 20p y1 32768hz 47k 47k 47k 47k 47k 47k 47k 0.1uf r 0.1uf 0.1uf + 47uf 260k 560k 4.7uf 3.0v 1 2 0.1uf r 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf 4.7uf r 0.1uf 0.1uf 0.1uf 0.1uf r 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf y2 4mhz 15p 15p 0.1uf 0.1uf 10uf 4.7uf 4.7uf 0.1uf 0.1uf 4.7uf 4.7uf 10uf 10uf 4.7uf 4.7uf 4.7uf 0.1uf 0.1uf 4.7uf 0.1uf 1uf 10uf 4.7uf 0.1uf 0.1uf 4.7uf buzzer 0.1uf 0.1uf r r r rc osc. rc osc. x4 multiplier x5 multiplier x3 multiplier 64x96 80x80 comxseg 32x128 48x112 : .... lio17=1 lio17=0 lio15=0 lio15=1 lio14=0 lio14=1
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 28 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. 21. important note 1. to access any data rom (drom) of which address is larger than 64kb, use rs must update tpp first, tph 2nd and tpl lastly. only follow this order, the pre-charge circuit of drom will work correctly. since the data rom is a low speed rom. 5us waiti ng time is necessary before ldv instruction is executed to access the drom. note this 5us delay c an?t be emulated in the developing tools (ice and kbids) and the 5us delay s hould be added by firmware. 2. lcd driving circuit must be turn of f before ic enters into sleep mode. 3. please bonds the tstp_p, rstp_n and prtd[7:0] w ith test point on pcb (can be soldered and probed) as you can. if necessary, some ic testing can be done on the pcb. the following figure is an example (testing point with through hole). 4. lvp must small than 8.5 volt. otherwise ic may breakdown. 5. the lcd voltage adjustment mechanism shall be reserved for lv5 voltage fine-tunes; since it?s possible there is some variation in lv5 voltage due to ic manufacture process variation. user can use variable-resistor to adjust the lv5 voltage or use some tools to detect the lv5 and then select a proper resistor. please refer to application note an025 for the detailed description. 6. users must call the library ?swap_page? in the file swappage.asm of an029. the real ic register is different from ice4.x or ice5.x. this subroutine makes sure that users ca n run on both real ic and ice for page swapping. .area swapping_variable(data) _mapreg1:: .ds 1 ;store page register(r1bh) _mapreg2:: .ds 1 ;store page register(r1ch) .area swapping_page(code,pag0) ;======== ================== ================== ========== ;swap page function ;================= ========================= ============
king billion electronics co., ltd E | ? HE84770D he80000 series august 7, 2006 page 29 of 29 v1.2 this specification is subject to change without notice. please contact sales person for the latest version before use. swap_page:: lda #10h sta _mapreg1 lda #00h ; p1e_o[2] <--0 to enable port r1fh sta r_iceco ; r_iceco is write only lda _mapreg2 sta r_iced lda _mapreg2 anda #0fh ora #20h ;mapping _mapreg2 low nibble to logical segment2 ; sta r1ch sta r_ps1 lda _mapreg2 rorc rorc rorc rorc anda #0fh ;mapping _mapre g2 high nibble to logical segment3 ora #30h ; sta r_ps1 sta r1ch ret 22. updated record version date descriptions v1.0 2006.5.12 preliminary v1.2 2006.8.7

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